1. Field of the Invention
The present invention generally relates to semiconductor fabrication, and particularly to structure of semiconductor device and semiconductor apparatus.
2. Description of Related Art
The circuit structure of semiconductor device usually includes a number of element parts. These element parts are respectively electrically connected together to form a full circuit structure.
Taking the memory cell of a memory apparatus as an example, such as the structure of statistic random access memory (SRAM), it is a basic structure formed by six transistors. These six transistors are usually called as 6T. If the interface port is added in the circuit design, such as a read port or a connection port, the transistor includes not only the 6T but also the transistors for the interface port. In an example, it is a circuit of 8T/10T SRAM. The gate line of the transistors of these interface ports is connected to the circuit of 6T main body. The structure of the 6T is symmetric. However, if the circuit is added with the interface port, the layout of the gate line at the portion for external connection would not be symmetric. This causes an effect to in operation performance.
Further as to one gate line, in circuit structure, it also provides a connection to the gate terminals of the related transistors. Generally, the gate line is cut into multiple gate segments. Each gate segment is connected with multiple transistors. Thus, to the transistor array, the original gate line is connected with multiple transistors, and then the original gate line is cut to form a multiple connection groups.
When the gate line is cut, the physical stress would occur, which further influence the conductive property of the semiconductor material of the transistors at the near region to the cut and then influence the electric functionality. According to the actual research about conductivity, the operation performance of the transistor as connected to the gate line is indeed influenced when the gate line is cut. Thus, for the structure of 6T SRAM above, if the gate line is extended to connect to the read port, it causes the different performance of the transistors in operation. The operation performance of the 6T SRAM is reduced.
To the transistors of SRAM above, if the transistors are formed by fin field effect transistors, the influence as caused by cutting the gate line or breaking the symmetry of the circuit would be more observable.
It is still an issue as concerned in development about how to reduce the factors to cause the change of electric property when gate line is extended to connect out.